2 Commits

Include renames

Author	SHA1	Message	Date
rorappandClaude Opus 5.5	f90b7df31c	TTS-Slots (Piper CPU, Qwen3-TTS auf Ada), M4000 außer Betrieb, Engine-Grenzen im Placement (ADR-0006) ... Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>	2026-10-12 02:12:30 +02:00
rorappandClaude Opus 5.5	4cbe313c62	core: Inventar/Placement, Konfig-Validierung, CLI, HTTP-API, LiteLLM-Konfiguration, Beispiel-Skills ... Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>	2026-10-12 00:47:13 +02:00